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Design Verification Engineer

Engineer - Engineering - Marcham, Vancouver (Hybrid), Canada

Job Title Design Verification Engineer
Job Description

At AMD we care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences, the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives.

AMD together we advance_

THE ROLE

The focus of this role is to plan, build, and execute the verification of new and existing features for AMD IOHUB IP, resulting in no bugs in the final design. 

THE PERSON

You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/time zones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems.

RESPONSIBILITIES

  • Collaborate with architects, hardware engineers, and firmware engineers to understand the new features to be verified
  • Build test plan documentation, accounting for interactions with other features, the hardware, the firmware, and the software driver use cases
  • Estimate the time required to write the new feature tests and any required changes to the test environment
  • Build the directed and random verification
  • Debug test failures to determine the root cause; work with RTL and firmware engineers to resolve design defects and correct any test issues 
  • Review functional and code coverage metrics modify or add tests or constrain random tests to meet the coverage requirements

REQUIREMENTS

  • Proficient in IP level ASIC verification
  • Proficient in debugging firmware and RTL code using simulation tools 
  • Proficient in using UVM testbenches and working in Linux and Windows environments
  • Experienced with Verilog, System Verilog, C, and C++.
  • PCI/PCIe and computer architecture knowledge.
  • Developing UVM based verification frameworks and testbenches, processes and flows.
  • Automating workflows in a distributed compute environment. 
  • Exposure to simulation profile, efficiency improvement, acceleration, HLS tools/process.
  • Strong background in the C++ language, preferably on Linux with exposure to Windows platform.
  • Good understanding and hands-on experience in the UVM concepts and SystemVerilog language.
  • Good working knowledge of SystemC and TLM with some related experience. 
  • Scripting language experience: Python, Ruby, Makefile, shell preferred. 
  • Exposure to leadership or mentorship is an asset
  • Desirable assets with prior exposure to video codec system or other multimedia solutions. 
  • Some AI knowledge is preferred.

ACADEMIC QUALIFICATIONS

  • Bachelors or Masters degree in computer engineering/Electrical Engineering

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Sector Engineering
Category Engineer
Level Intermediate
Contract Type Permanent
Hours Full Time
Date Posted 4 October 2024
Reference LI-TB2
Recruiter AMD
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